Crate atecc608b 

no_std asynchronous driver for the Microchip ATECC608B secure element.

This crate is intentionally generic over a hal::AteccHal trait so it can be built against any concrete hardware backend (RP2040 + embassy-rp, an STM32, or an in-memory mock for host-side tests). The crate is no_std and does not allocate on the heap.

Layered architecture

The driver is split into several internal modules that map one-to-one to the layers of the protocol:

• crc - CRC-16/DNP implementation used by every command frame.
• packet - Encoding and decoding of the command/response packet.
• wake - Wake / idle / sleep sequence and the response polling loop.
• command - One module per high-level command (Info, Random, Sign, GenKey, etc). Each one exposes a typed async function on the driver::AteccChannel handle.
• error - Error types for each layer, with From conversions for chaining.
• opcodes - Numeric constants extracted from the Microchip CryptoAuthLib reference. Treat this as the single source of truth for on-the-wire values.
• hal - The hal::AteccHal trait every backend must implement.
• slot - Slot identifiers and helpers.
• driver - The top-level driver::Atecc handle (sleeping) and driver::AteccChannel (awake) that together model the chip’s wake / idle lifecycle.

Re-exports

pub use driver::Atecc;

pub use driver::AteccChannel;

pub use hal::AteccHal;

Modules

command

High-level typed commands exposed on crate::Atecc.

crc

CRC-16 as used by the ATECC608B protocol.

driver

Top-level driver handle.

error 🔒

Error types for the ATECC608B driver.

hal

Hardware Abstraction Layer (HAL) the driver depends on.

opcodes

Numeric constants of the ATECC608B protocol.

packet 🔒

Encoding and decoding of ATECC608B command and response frames.

slot 🔒

Slot identifiers.

wake 🔒

Wake, idle, and sleep sequences for the ATECC608B.

Structs

Slot

A validated slot identifier.

Enums

AteccError

Error returned by every public method of crate::Atecc.

AteccErrorKind

Non-generic projection of AteccError.

ChipError

Errors reported by the chip itself via a 4-byte response frame.