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Module wake

atecc608b

Module wake 

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Wake, idle, and sleep sequences for the ATECC608B.

The chip spends most of its life in deep sleep (under 150 nA). To talk to it the driver must first perform a wake sequence. After commands have been issued, the driver should put the chip back to idle or sleep before its watchdog (about 1.3 s nominal) elapses on its own.

The functions in this module are agnostic to the high-level command flow. They live one level below crate::driver::Atecc and operate directly on a HAL plus an I2C address.

§Wake protocol

  1. Pull SDA low for at least crate::opcodes::WAKE_LOW_DURATION_US microseconds.
  2. Release SDA and wait crate::opcodes::WAKE_DELAY_US microseconds.
  3. Read 4 bytes back over I2C. They must equal crate::opcodes::WAKE_RESPONSE_OK (04 11 33 43).

If the chip’s power-on self-test failed, the response is crate::opcodes::WAKE_RESPONSE_SELFTEST_FAIL (04 07 C4 40) instead.

§Idle and sleep

  • Idle preserves the contents of TempKey and the random number generator state. Useful between two related commands.
  • Sleep clears volatile state and brings the chip back to its low power consumption level.

Both are issued as a single I2C write of the corresponding word address byte, with no payload.

Functions§

idle 🔒
Put the chip into idle.
sleep 🔒
Put the chip into deep sleep.
wake 🔒
Perform the wake sequence and verify the chip’s response.